This disclosure relates to memory circuits and data processing systems.
Some data processing systems may be designed or required to operate at different supply voltages.
In the case of memory circuits, many designs of memory element depend upon detecting a read signal and differentiating whether the read signal is indicative of a stored logical 1 or a stored logical 0. As the supply voltage decreases, in the absence of techniques to alleviate these problems, the operation of the memory circuit can become less reliable. Faults or incorrect operation can occur on either or both of the memory read and the memory write operations.
One approach which aims to provide more reliable operation of voltage scalable memory circuits is to modify the design of the memory element or the basic bit cell architecture such as a so-called 6T (6 transistor) static random access memory (SRAM) cell by incorporating additional transistors. For example, these extra transistors can serve the purpose of avoiding a contention between read- and write-accesses as in an 8T architecture or providing improved crosspoint selection so as to avoid a so-called read-disturb during unselected write accesses, as in a 10T architecture.
The 6T cell is an established architecture and fabrication techniques have been developed to allow efficient layout and fabrication of arrays of 6T cells and, once fabricated, efficient operation and power consumption of the arrays. The term “foundry optimised” is sometimes used to refer to such 6T cells. This colloquial term in the art does not imply that such 6T layouts are perfect, but instead refers to the relative level of sophistication of the established 6T designs in comparison to some other bit cell designs. However, the 6T cell has lower capabilities for voltage scalable operation than other cell designs using more transistors. Having said that, each of the modifications mentioned above requires bespoke non-foundry-optimised bit cells that can potentially add area and/or power overheads and can require more work in their layout.